HC908 Application Note #2
Memory Map

This Resource Page presents basic guidance, application notes, documentation and other useful information for homebrewers looking to use their HC908 Daughtercard at its fullest potential.

$0000
|
$004F
I/O Registers  (80 Bytes)
$0050
|
$044F
RAM  (1,024 Bytes)
$0450
|
$04FF
Unimplemented (176 Bytes)
$0500
|
$057F
Reserved (128 Bytes)
$0580
|
$07FF
Unimplemented (640 Bytes)
$0800
|
$09FF
EEPROM (512 Bytes)
$0A00
|
$7FFF
Unimplemented (30,208 Bytes)
$8000
|
$FDFF
FLASH MEMORY (32,256 Bytes)

USER APPLICATION AREA ($8000-$EF00)
$8000 ; ADC Conversion Complete vector to user jump table
$8003 ; Keyboard Vector to user jump table
$8006 ; SCI Transmit Vector to user jump table
$8009 ; SCI Receive Vector to user jump table
$800C ; SCI Error Vector to user jump table
$800D -- RESERVED
$800E --  RESERVED
$800F ; TIMB Channel 3 Vector to user jump table
$8012 ; TIMB Channel 2 Vector to user jump table
$8015 ; SPI Transmit Vector to user jump table
$8018 ; SPI Receive Vector to user jump table
$801B ; TIMB Overflow Vector to user jump table
$801E ; TIMB Channel 1 Vector to user jump table
$8021 ; TIMB Channel 0 Vector to user jump table
$8024 ; TIMA Overflow Vector to user jump table
$8027 ; TIMA Channel 3 Vector to user jump table
$802A ; TIMA Channel 2 Vector to user jump table
$802D ; TIMA Channel 1 Vector to user jump table
$8030 ; TIMA Channel 0 Vector to user jump table
$8033 ; TIM Overflow Vector to user jump table
$8036 ; PLL Vector to user jump table
$8039 ; ~IRQ1 Vector to user jump table
fdb _break_pt ; SWI break point vector
fdb _bootreset ; Reset vector to start of Monitor

HC MONITOR AREA ($EF00-$FDFF)

$FE00 SIM Break Status Register (SBSR)
$FE01 SIM Reset Status Register (SRSR)
$FE02 Reserved
$FE03 SIM Break Flag Control Rgister (SBFCR)
$FE04
|
$FE07
Reserved (4 Bytes)
$FE08 FLASH Control Register (FLCR)
$FE09
|
$FE0B
Reserved (3 Bytes)
$FE0C Break Address Register High (BRKH)
$FE0D Break Address Register Low (BRKL)
$FE0E Break Status and Control Register (BRKSCR)
$FE0F LVI Status Register (LVISR)
$FE10 EEPROM Divider Non-volatile Register High (EEDIVHNVR)
$FE11 EEPROM Divider Non-volatile Register Low (EEDIVLNVR)
$FE12
|
$FE19
Reserved (19 Bytes)
$FE1A EEPROM Time Base Divider Register High (EEDIVH)
$FE1B EEPROM Time Base Divider Register Low (EEDIVL)
$FE1C EEPROM Non-volatile Register (EENVR)
$FE1E Reserved (1 Byte)
$FE1F EEPROM Array Configuration Register (EEACR)
$FE20
|
$FF52
Monitor ROM (307 Bytes)
$FF53
|
$FF7D
Unimplemented (43 Bytes)
$FF7E FLASH Block Protect Register (FLBPR)
$FF7F
|
$FFBF
Unimplemented 65 Bytes)
$FFC0
|
$FFCF
Reserved FLASH Memory (16 Bytes)
Reserved for Compatibility with HC08AB16/24/32
$FFD0
|

$FFFF
FLASH Vectors (48 Bytes)
$FFD0 --  adc_vec -- ADC Conversion Complete vector to user jump table
$FFD2 --  keyboard -- Keyboard Vector to user jump table
$FFD4 --  scitx -- SCI Transmit Vector to user jump table
$FFD6 --  scirx -- SCI Receive Vector to user jump table
$FFD8 --  scierr -- SCI Error Vector to user jump table
$FFDA --  RESERVED
$FFDC --  RESERVED
$FFDE --  timbch3 -- TIMB Channel 3 Vector to user jump table
$FFE0 --  timbch2 -- TIMB Channel 2 Vector to user jump table
$FFE2 --  spitx -- SPI Transmit Vector to user jump table
$FFE4 --  spirx -- SPI Receive Vector to user jump table
$FFE6 --  timb_of -- TIMB Overflow Vector to user jump table
$FFE8 --  timb_ch1 -- TIMB Channel 1 Vector to user jump table
$FFEA --  timb_ch0 -- TIMB Channel 0 Vector to user jump table
$FFEC --  tima_of -- TIMA Overflow Vector to user jump table
$FFEE --  tima_ch3 -- TIMA Channel 3 Vector to user jump table
$FFF0 --  tima_ch2 -- TIMA Channel 2 Vector to user jump table
$FFF2 --  tima_ch1 -- TIMA Channel 1 Vector to user jump table
$FFF4 --  tima_ch0 -- TIMA Channel 0 Vector to user jump table
$FFF6 --  tim_of -- TIM Overflow Vector to user jump table
$FFF8 --  pll -- PLL Vector to user jump table
$FFFA --  irq -- ~IRQ1 Vector to user jump table
$FFFC --  break -- SWI break point vector
$FFFE --  reset -- Reset vector to start of Monitor

 

Last Modified:  April 20, 2003